Field of the Invention
The invention lies in the semiconductor technology field. More specifically, the invention relates to a semiconductor component which comprises at least one semiconductor chip having contact pads, a number of substrate layers, component contacts and conductor tracks which establish the electrical connection between the contact pads of the at least one semiconductor chip and the component contacts. The invention further relates to a method of producing such a semiconductor component.
Surface-mounted electronic components, also called SMD components, are usually embedded in a package of plastic molding compound from which electrical connections are brought out. There exist a large number of different types of package constructions which are of different sizes and have a different number of connections. In that configuration, a semiconductor chip is first connected to a lead frame. The semiconductor chip is usually connected to the lead frame by means of bonding, by soldering or by alloying. After the semiconductor chip has been attached, its individual connecting points are connected to the connections of the support frame, for example by means of bonding wires. After that, the semiconductor chip and the connections of the lead frame are injection-molded in such a manner that the semiconductor chip is completely encapsulated and the connections protrude from the package.
Semiconductor components must be increasingly thinner and they must be constructed with a smaller base area and less volume consumption. In the case of a storage component, the highest possible storage density is to be implemented in the smallest possible volume. There is already an ultra-thin package for storage chips, the so-called bottom-leaded plastic package (BLP). If the package space requirement is to be reduced, this can only be done by means of a much finer lead pitch in the case of a peripheral arrangement of the external leads. However, this miniaturization of the arrangement of the external leads brings one ever closer to the boundaries of processing capability, both in the production of the design and in the soldering-in on the chassis. This necessitates completely new technologies of the design, for example the multi-chip module.
In a multi-chip module, a number of semiconductor chips are placed in one plane next to one another on a substrate and are connected to the latter. In that configuration, it is possible to implement internal chip-to-chip connections. Apart from the plastic lead-frame packages, there are also ceramic packages comprising a cavity in which the semiconductor chips are inserted. There are different principles of design:
In a first form, a multi-layer wiring system (substrate) is integrated in a plastic package.
In a second form, the package includes a wiring frame system (cofired ceramic and laminate packages).
In a third, and the simplest, form the package is designed without wiring frame system. This offers the possibility of connecting the semiconductor chips directly to one another via a wire link in simple multi-chip modules having two or, at a maximum, three semiconductors.
The problem in the production of multi-chip modules is that the substrate must be produced very expensively as multi-layer wiring system. In a suitable sequence, insulating and metal layers and via holes must be placed in order to connect the chip connections to one another or, respectively, to conduct them to the outside. The current processes used in mounting the semiconductor chips are chip bonding and electrical contacting of the semiconductor chip onto the substrate, using both the wire bonding process and the flip chip method. Following this, the components are encapsulated by being sheathed with a plastic compound. In the case of ceramic packages, soldered or welded seals with a metal lid are normally used.
Apart from the complicated production of the substrate, the main disadvantage of the multi-chip modules consists in that they are not suitable for economic mass production.
U.S. Pat. No. 5,434,745 describes a semiconductor component which has a high packing density and, at the same time, requires little space by providing a module-by-module structure. There, a module consists of two substrate layers, the first substrate layer having a structured metalization on which a semiconductor chip is placed. The second substrate layer is formed with an opening instead of the semiconductor chip and is connected to the first substrate layer in a superimposed manner. An arbitrary number of modules can be connected to one another stacked on top of one another. The stack includes on two opposite outer sides semicircular via holes which are precisely above one another over all substrate layers, which holes are filled with a conductive material so that all semiconductor chips are electrically connected to one another. The stack is placed on another substrate, packaged and then provided with external component contacts.
The object of the invention is to provide a semiconductor component with several substrate layers and one or more semiconductor chips, as well as a method of producing the semiconductor component, which overcome the above-noted deficiencies and disadvantages of the prior art devices and methods of this kind, and which semiconductor component has the greatest possible packaging density with the smallest possible base area. Furthermore, the component should be usable for radio-frequency applications.
With the above and other objects in view there is provided, in accordance with the invention, a vertically mountable and stacked semiconductor component, comprising:
a plurality of interconnected substrate layers lying above one another and having ends;
at least one semiconductor chip formed with contact pads disposed in an opening formed in the substrate layers;
external component contacts disposed laterally at the ends of respective substrate layers;
an electrical connection between the contact pads of the semiconductor chip and the component contacts, the electrical connection including conductor tracks of a respective substrate layer extending from an area at the semiconductor chip to the edge area of the respective substrate layer, the conductor tracks of a substrate layer having a substantially equal length; and
the electrical connection being configured to define a signal delay of substantially equal length between each contact pad of the semiconductor chip to an associated the component contact.
There is also provided, in accordance with the invention, a method of producing the vertically mounted and stacked semiconductor component. The method comprises the following steps:
providing a first layer of a two-layer substrate material with a plurality of substantially equal-length conductor tracks and a second layer of the two-layer substrate with at least one opening, the conductor tracks ending on one side of the substrate layer for placing external component contacts;
placing at least one semiconductor chip in the at least one opening;
connecting the at least one semiconductor chip to the first substrate layer;
electrically contacting the at least one semiconductor chip with the conductor tracks; and
placing a further substrate layer without conductor tracks and openings on the two-layer substrate material and covering the second layer with the opening.
Furthermore, there is provided a method of producing a semiconductor component with plug contacts, which comprises the following steps:
providing a first layer of a two-layer support material with substantially equal-length conductor tracks, and a second layer of the two-layer support material with an opening, the conductor tracks being structured between the two layers, the first layer having an elongated side provided with metalization contacts and mechanical coding;
placing at least one semiconductor chip into the opening;
connecting the at least one semiconductor chip to the first substrate layer;
electrically contacting the at least one semiconductor chip with the conductor tracks; and
placing a further substrate layer without conductor tracks and openings on the two-layer substrate material and covering the second layer with the opening.
In other words, a number of semiconductor chips are accommodated in one package and they are arranged not only in one substrate plane but it is also possible to arrange them three-dimensionally. The semiconductor component, therefore, consists of at least one semiconductor chip and is constructed of a number of superimposed substrate layers which are permanently joined to one another. In this arrangement, there are substrate layers which are provided with at least one opening, and substrate layers with conductor tracks. The openings of the substrate layers are used for accommodating in each case at least one semiconductor chip. The conductor tracks of respective substrate layers terminate in an area in the vicinity of the at least one semiconductor chip and in an edge area of the respective substrate layers, that is to say at one side of the semiconductor component. The conductor tracks are connected to component contacts there. The semiconductor chips located in the openings are electrically conductively connected to the conductor tracks so that an electrical connection to the outside can be established via the component contacts of the semiconductor component. The advantage of the semiconductor component built up of a number of substrate layers consists in that each substrate layer can include openings into which semiconductor chips can be inserted so that both a number of semiconductor chips can be arranged next to one another in one substrate layer and above one another. Due to this structure, a compact package dimension is possible. A great advantage of the semiconductor component according to the invention consists in that the conductor tracks are conducted to the outside in the plane of the substrate layers. The conductor tracks can be placed on the substrate layers by simple and inexpensive etching or laminating. The conductor track density remains the same in each substrate layer plane which ensures a simple run of the conductor tracks even in the lower substrate layers. According to the invention, the semiconductor chips of the semiconductor component, after having been mounted on a chassis, are located in a vertical position similar to a so-called xe2x80x9cvertical surface mounting packagexe2x80x9d (VSMP). Furthermore, known production methods can be used in the production of the substrate layers. The openings can be made, for example, by a punching or stamping process. The conductor tracks can be placed on a substrate layer by means of an etching process or a galvanic process. The substrate layers can be attached, for example, by means of bonding, alloying or laminating. A further advantage consists in that various methods can be used for producing electrical contacts. The electrical contacting can take place, for example, via bonding wires, via a so-called spider band or via a so-called flip chip process. Due to the fact that the openings of a substrate layer are covered by the overlying substrate layer, it is not necessary to protect the semiconductor chip located in the opening by means of a plastic molding compound. It is only in the case where a substrate layer located at the edge of the semiconductor component includes an opening that a corresponding plastic molding compound or a cover must be provided for the opening for protecting the semiconductor chip. However, it is also possible at any time to fill each opening with a plastic molding compound.
In accordance with an added feature of the invention, a substrate layer on which conductor tracks are provided is alternately arranged on top of one another with a substrate layer which includes at least one opening. The advantage of this type of arrangement consists in that the semiconductor component can be produced in a particularly easy manner since there is no elaborate disentanglement of the conductor tracks within the substrate layers required. Depending on the number of connections of the semiconductor chip required, it is sufficient to place the conductor tracks on one top of the substrate layer. The substrate layer containing conductor tracks and the substrate layer containing the at least one opening are connected to one another in such a manner that the conductor tracks come to lie between the two substrate layers. The semiconductor chip can be inserted into this two-layer support element and attached. After the electrical contacting of the semiconductor chip and possible filling of the opening with a plastic molding compound, a further two-layer support material can be applied. The second two-layer support material is applied to the substrate layer which has the opening. A particularly space- and volume-saving semiconductor component is given if the openings of the superimposed semiconductor layers are arranged above one another.
By alternately arranging a substrate layer with conductor tracks and a substrate layer with opening, it is conceivable that one of the two terminating substrate layers of the semiconductor component includes an opening comprising a semiconductor chip. The protection of the semiconductor chip located in the opening can be ensured by filling it with plastic molding compound. In an advantageous embodiment, a further substrate layer, which includes neither conductor tracks nor openings, is placed onto the substrate layer with opening. This further substrate layer serves exclusively as cover layer and closes off the semiconductor component.
The conductor tracks on a substrate layer are placed in such a manner that after the connection to a substrate layer with opening, the one ends of the conductor tracks are located within an opening. After all substrate layers of the component have been joined together, the other ends of the conductor tracks point to one side of this semiconductor component. The component contacts are connected to these conductor track ends of the semiconductor component. The component contacts are used for the further electrical contacting on an assembly.
After all substrate layers have been connected and a substrate layer serving as cover layer has been put in place, the semiconductor component includes a cube-shaped form of construction. This is the solution which saves the most space. In a further embodiment, at least one substrate layer can extend over other substrate layers on one or more sides on which no component contacts are placed. Enlarging the area of individual substrate layers enlarges the surface of the semiconductor component. This facilitates the removal of heat. The individual elongated substrate layers handle the function of a heat distributor in this case. It is conceivable to enlarge arbitrary substrate layers. In an especially advantageous embodiment, a substrate layer with optimized area and a substrate layer with enlarged area are alternately arranged.
This arrangement makes it possible to achieve the largest surface of the semiconductor component. In an advantageous embodiment, substrate layers comprising conductor tracks are utilized as heat distributors. It is possible to optimize the heat distribution or, respectively, heat removal depending on how far these substrate layers used as heat distributors extend over the substrate layers with optimized area.
In a further variation, the substrate layer which is provided with conductor tracks and includes at least one semiconductor chip can be provided with conductor tracks on one or two sides. The advantage of a substrate layer having conductor tracks on both sides consists in that in the case of semiconductor chips having a large number of connections or of a number of semiconductor chips having a large number of connections in aggregate, the lead pitch can be selected in a size which can be easily processed.
Providing a number of semiconductor chips in one semiconductor component necessitates a supply to each semiconductor chip. In a conventional embodiment, each semiconductor chip is supplied via its own supply line. In an especially advantageous embodiment, all semiconductor chips are supplied via a common supply line. The advantage of this feature consists in that the number of connections of the semiconductor component can be reduced by (number of semiconductor chips xe2x88x921)xc3x972. For this purpose, two supply conductor tracks are run into the semiconductor component on one substrate layer, a xe2x80x9cconductor trackxe2x80x9d being generated perpendicularly to the areas of the semiconductor chips by means of via holes in the individual substrate layers. The via holes, in turn, are connected in the respective substrate layers to conductor tracks which are connected to the supply connections of the semiconductor chip.
The individual substrate layers can be joined to one another by laminating, alloying or bonding. In an especially advantageous embodiment, an anisotropic conductive adhesive is used for the bonding. An anisotropic conductive adhesive has the property of being electrically conductive in one direction but acting as an insulator transversely to this direction. The advantage of using the anisotropic conductive adhesive consists in that when two substrate layers are joined, the via holes of these two substrate layers which are arranged above one another are electrically conductively connected to one another.
The semiconductor chip can be mounted on a substrate layer by bonding, laminating or alloying. Depending on the electrical contacting provided, the contact pads of the semiconductor chip are arranged face up or face down. Depending on the electrical contacting, the contact pads can be arranged on the semiconductor chip surface in any manner. In the case of flip chip contacting, the contact pads can form an array, in the case of spider contacting or of a wire-bond process, the contact pads can be arranged on the peripheral edges of the semiconductor chip. In an especially advantageous embodiment, the contact pads are arranged in one row parallel to one side edge of the semiconductor chip. This can be done either closely to an edge or also in the center. After the semiconductor chip has been mounted on the substrate layer, the contact pads forming one row are arranged in such a manner that they are parallel to the side at which the contact elements of the semiconductor component are placed. If the contact pads are arranged close to one chip edge, this chip edge should be oriented toward the side of the semiconductor component at which the component contacts of the semiconductor component are later placed. In an especially advantageous embodiment, the at least one semiconductor chip is bonded to the respective substrate layer by means of an anisotropic conductive adhesive.
If the semiconductor chips are contacted on the respective substrate layer by means of flip chip contacting, the contact pads of the semiconductor chip are arranged preferably in one row parallel to one side edge of the semiconductor chip. Aligning the contact pads in one row necessitates conductor tracks of equal length on the substrate layer. This provides the advantage that in applications with very high frequency, the same signal delays are generated for each contact pad. In the semiconductor component, all semiconductor chips are preferably arranged precisely above one another so that the same signal delay to the component contacts exists from each contact pad of each semiconductor chip of the semiconductor component due to the equal lengths of the conductor tracks in the respective substrate layers. This is a necessary criterion especially in applications with very high frequencies.
If the semiconductor chips are electrically connected to the conductor tracks of the respective substrate layer by means of bonding wires or by means of a spider tape, conductor track length and electrical connection to semiconductor chip are matched to one another in such a manner that the same signal delay to the component contacts of the semiconductor component from the contact pads of the semiconductor chip is produced.
The semiconductor component according to the invention is characterized by the fact that either FR4 or an aluminum foil, which is at least partially oxidized through, is used as substrate layer material. The advantage of using FR4 consists in that this material is known and can be easily processed, and the existing equipment can be utilized for processing. The advantage of using an aluminum foil which is at least partially oxidized through consists in that the individual substrate layers are more easily bonded than the FR4 foil consisting of polyimide. A further advantage of an aluminum foil consists in that it has a lower price than a polyimide foil, that it cannot absorb any moisture and that better machinability in punching out via holes or openings is ensured compared with FR4. Furthermore, the coefficient of expansion of the aluminum foil is a better match for that of the semiconductor chip. It is also advantageous that the aluminum foil acts as an electrical insulator. If the foil is only partially oxidized through, a core of aluminum remains within the foil. This core serves as electrical shielding of the individual substrate layers against one another. This eliminates any interaction between the electrical characteristics of the semiconductor chips.
The semiconductor component according to the invention is also wherein balls, pins or plug connections can be placed as component contacts.
If balls are provided as component contacts, a ball grid array (BGA) is produced on one side of the semiconductor component. This can be processed by means of the known production steps. Placing the balls on one side of the semiconductor component can be done in various ways. In one embodiment, the conductor tracks of the respective substrate layers are bent around one edge of the respective substrate layer and are flat on the side on which the component contacts are provided. The balls can be placed and mounted on these bent-over conductor tracks. In an advantageous embodiment, the substrate layers which have the openings for accommodating at least one semiconductor chip have recesses on the side on which the component contacts are provided. These recesses include the width of one conductor track and are arranged in such a manner that the conductor tracks of the underlying substrate layer come to lie within the recess. The balls can be inserted into the recesses and soldered to the conductor track. The advantage of this embodiment consists in that the balls are permanently fixed to the conductor tracks and are better secured mechanically against loading. In another advantageous embodiment, support conductor tracks which are opposite the signal-conducting conductor track in the recess and are only used for the purpose of achieving better and more secure soldering and attachment of the ball in the recess are also provided in the recesses. The support conductor track is placed on the underside of the substrate layers on which the signal-conducting conductor tracks are placed. In the preferred embodiment, the recesses are arranged in the substrate layers which have the openings for the semiconductor chips. However, it is also conceivable that the recesses are placed in the substrate layers on which the signal-conducting conductor tracks are located. Using the balls as component contacts is especially appropriate when the semiconductor component is used as storage chip with a volatile memory (DRAM).
Due to the high storage density which the semiconductor component has due to the multiplicity of semiconductor chips, the use of non-volatile memories (ferro DRAMs) is also appropriate. This then provides for a transportable storage medium. For this purpose, the component contacts can be constructed as plug connections or as pins. This provides for a particularly variable use of the semiconductor component. Constructing the component contacts as plug connections is achieved by at least one substrate layer being elongated with respect to the substrate layers with optimized area, on the side on which the component contacts are provided. Advantageously, substrate layers are elongated which are provided with conductor tracks. At the ends of the elongated substrate layers, so-called metalization contacts which provide for the electrical connection to the chassis are applied to the conductor tracks. The metalization contacts can be placed on one or both sides on the ends of the substrate layers. In one embodiment, it is possible to connect the two metalization contacts of a substrate layer to one another and thus to ensure a better contact point to the chassis. If, however, conductor tracks are placed on both sides of the elongated substrate layers, it is conceivable that two different signals are conducted into the chassis on the respective opposite sides. Due to this design, the number of connection contacts can be doubled.
To avoid confusion when plugging the plug connection into the chassis, at least one plug connection of at least one substrate layer includes mechanical coding. The mechanical coding consists, for example, in that the substrate layers which have the plug connections are constructed to be oblique on one side or have a polygonal cutout. It is also conceivable that a recess is provided between two or more metalization contacts. Any form whatever which ensures that the semiconductor component with the plug connections cannot be placed on the chassis in an incorrect manner is conceivable.
Furthermore, as noted above, the method for producing a semiconductor component is part of the invention. The method consists of the following steps for producing a semiconductor component in its simplest form: a two-layer support material is provided, a substrate layer being provided with conductor tracks and the other substrate layer being provided with at least one opening. These two substrate layers are joined in such a manner that the conductor tracks are located between the two substrate layers connected to one another. In each case, at least one semiconductor chip is inserted into the at least one opening and is permanently connected to the substrate layer which has the conductor tracks. The semiconductor chip is then electrically contacted with the conductor tracks. In the simplest form, a further substrate layer which has neither conductor tracks nor openings is placed on these two substrate layers. In the advantageous embodiment, a number of the two-layer support materials are placed above one another, each substrate layer having an opening in which in each case one semiconductor chip is placed. The openings or, respectively, the semiconductor chips, are located precisely on top of one another within the semiconductor component. The advantage of this design is the possibility of designing the signal delays between the contact pads and the respective component contacts to be of equal length.
If the component contacts consist of balls, recesses are additionally provided on the one side of the substrate layer in the substrate layer of the two-layer support material which has the opening. Furthermore, support conductor tracks are placed on the other substrate layer of the two-layer support material which has the conductor tracks, on the opposite side of the substrate layer. The two substrate layers are then processed to become the two-layer support material. In the subsequent step, the chip is again inserted in the opening and electrically connected to the conductor tracks. In the semiconductor component which now has recesses on the side on which the component contacts are provided in this embodiment, the balls are inserted into the recesses and connected to the conductor track and support conductor track. This type of mounting of the balls in the recesses brings with it higher mechanical strength.
In a second embodiment of the semiconductor component with balls as component contacts, the substrate layer which has the conductor tracks is provided with conductor tracks which protrude past one side of the substrate layer in the production of the two-layer support material. The conductor tracks protrude over the thickness of two adjacently located substrate layers as a maximum. After the semiconductor chips have been inserted into the openings and electrically contacted, a number of the two-layer support materials are arranged above one another and permanently connected to one another. After that, a substrate layer used as cover layer is placed. On one side of the semiconductor component, the conductor tracks are now projecting over the side of the semiconductor component. These projecting conductor tracks are bent over on the side of the semiconductor component in a bending process. The balls are placed on the bent-over ends of the conductor tracks which are in contact with the side of the semiconductor component and are connected to the conductor tracks.
If plug connections are provided as component contacts, the substrate layer which has the conductor tracks is elongated on the side on which the component contacts are provided, compared with the substrate layer having the openings. On the ends of the elongated side, metalization contacts are placed on the ends of the conductor tracks on one or both sides. After the semiconductor chip has been inserted into the opening and connected to the two-layer support material, the semiconductor chip is electrically contacted with the conductor tracks. In a subsequent step, a number of these two-layer support materials can be arranged above one another and, finally, a substrate layer without conductor track and without opening is placed on the substrate layer which has the at least one opening.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor component with a number of substrate layers and at least one semiconductor chip, and a method for producing such a semiconductor component, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.